/*=============================================================================
# FileName    :	udp_user_rx.v
# Author      :	author
# Email       :	email@email.com
# Description :	传递进来的数据流已经是udp数据报里的数据字段了。
                load_parameter:位宽可变。从udp自定义协议里解析的系统参数全部放到这里
# Version     :	1.0
# LastChange  :	2018-08-27 13:45:37
# ChangeLog   :	
=============================================================================*/

`timescale 1 ns/1 ps

module udp_user_rx #
(
    parameter C_CLK_FREQ_HZ   = 125_000_000
)
(
    input   wire                clk,
    input   wire                rst,

    input   wire [47:0]         s_axis_tsrcmac,
    input   wire [31:0]         s_axis_tsrcip,
    input   wire [07:0]         s_axis_tdata,
    input   wire                s_axis_tvalid,
    input   wire                s_axis_tlast,

    output  reg  [47:0]         rx_udp_srcmac,
    output  reg  [31:0]         rx_udp_srcip,

    output  wire [31:00]        load_parameter,      // 解析协议里的系统参数

    /* 上位下传的数据流, 数据端口只使用一个，提供最多8个选择端口
    */
    output  reg  [07:00]        load_m_axi_tdata,
    output  reg                 load_m_axi_tvalid,
    input   wire                load_m_axi_tready,
    output  reg                 load_m_axi_tlast
);
always @(posedge clk)
begin
    if(rst)
    begin
        rx_udp_srcmac <= 0;
        rx_udp_srcip  <= 0;
    end
    if(s_axis_tlast)
    begin
        rx_udp_srcmac <= s_axis_tsrcmac;
        rx_udp_srcip  <= s_axis_tsrcip;
    end
end

/*
 * 以下为测试代码
 */
always @ (posedge clk)
begin
    if(rst)
        load_m_axi_tdata <= 0;
    else
        load_m_axi_tdata <= s_axis_tdata;
end

always @ (posedge clk)
begin
    if(rst)
        load_m_axi_tvalid <= 0;
    else
        load_m_axi_tvalid    <= s_axis_tvalid;
end

always @ (posedge clk)
begin
    if(rst)
        load_m_axi_tlast <= 0;
    else
        load_m_axi_tlast <= s_axis_tlast;
end

endmodule
